US Patent 11302803 Semiconductor structure and method for fabricating the same

Semiconductor structure and fabrication method are provided. The method includes providing a substrate including a first region and a second region; forming a plurality of fins on the first region of the substrate; forming a first isolation structure on the first region and the second region of the substrate; forming a gate structure and a dummy gate structure each across fins and the first isolation structure at the first region; forming an epitaxial layer in each fin on two sides of the gate structure; forming a first opening by etching a portion of each of the first isolation structure and the substrate that are at the second region; filling the first opening with a conductive material layer; removing the dummy gate structure and a portion of the conductive material layer in the first opening to form a power rail; and forming a second isolation structure in a second opening.