Patent attributes
Provided is a circuit device including: a clock signal generation circuit generating a plurality of multi-phase clock signals; a time-to-digital conversion circuit performing a count operation based on an i-th clock signal that corresponds to a multi-phase clock signal, to obtain a count value that corresponds to a time difference between transition timings of a first signal and a second signal, to obtain a first digital value that corresponds to a time difference between transition timings of the first signal and a j-th clock signal that corresponds to a multi-phase clock signal, and to obtain a second digital value that corresponds to a time difference between transition timings of the second signal and a k-th clock signal that corresponds to a multi-phase clock signal; and a processing circuit obtaining a digital value that corresponds to the time difference based on the count value, the first digital value, and the second digital value.
