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US Patent 11335425 Memory system quality integral analysis and configuration
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Is a
Patent
Current Assignee
Micron Technology
Date Filed
September 14, 2020
Date of Patent
May 17, 2022
Patent Applicant
Micron Technology
Patent Application Number
17020324
Patent Citations
US Patent 10282107 Controlling I/O response time to meet service levels
US Patent 10535417 Memory system quality margin analysis and configuration
US Patent 10825540 Memory system quality integral analysis and configuration
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11335425
Patent Primary Examiner
Hiep T. Nguyen
CPC Code
G11C 29/44
G11C 29/56008
G11C 29/52
G11C 16/26
G11C 16/32
G11C 16/30
G11C 16/3495
G06F 13/1668
G06F 17/18
G11C 29/42
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