Patent attributes
The present invention includes an integrated system-on-chip device configured on a substrate member. The device has a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The input/output block comprises a SerDes block, a CDR block, a compensation block, and an equalizer block. The SerDes block is configured to convert a first data stream of N having a first predefined data rate at a first clock rate into a second data stream of M having a second predefined data rate at a second clock rate. The device has a driver module provided on the substrate member and coupled to a signal processing block, and a driver interface provided on the substrate member and coupled to the driver module and a silicon photonics device.
