US Patent 11349217 Method for integrating antennas fabricated using planar processes

Methods and devices for integrating antennas fabricated using planar laminate processes. The method includes laminating one or more conductive layers to a first dielectric material layer, forming one or more holes through at least the first dielectric material layer, forming a monopole antenna through at least a first of the holes, attaching one or more integrated circuit dies to one of the conductive layer, and connecting the integrated circuit dies to the monopole antenna. The device can include a planar laminate integrated circuit module including one or more dielectric material layers, one or more integrated circuit die on a surface of or attached to the planar laminate integrated circuit module, and an integrated monopole antenna interfaced with the integrated circuit dies. The integrated monopole antenna is formed in a through hole of the planar laminate integrated circuit module, the through hole being formed through at least one of the dielectric material layers.