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US Patent 11354056 Predictive data orchestration in multi-tier memory systems

Patent 11354056 was granted and assigned to Micron Technology on June, 2022 by the United States Patent and Trademark Office.

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Is a
Patent
Patent
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Patent attributes

Patent Applicant
Micron Technology
Micron Technology
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Current Assignee
Micron Technology
Micron Technology
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
113540560
Patent Inventor Names
Anirban Ray0
Gurpreet Anand0
Samir Mittal0
Date of Patent
June 7, 2022
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Patent Application Number
169058340
Date Filed
June 18, 2020
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Patent Citations
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US Patent 10282323 Memory channel that supports near memory and far memory access
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US Patent 10289566 Handling data that has become inactive within stream aware data storage equipment
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US Patent 10298496 Packet processing cache
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US Patent 10394789 Techniques and systems for scalable request handling in data processing systems
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US Patent 10430723 Storage system with machine learning based skew prediction
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US Patent 10514855 NVRAM path selection
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US Patent 10725663 Data management scheme in virtualized hyperscale environments
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US Patent 10782908 Predictive data orchestration in multi-tier memory systems
...
Patent Citations Received
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US Patent 12135876 Memory systems having controllers embedded in packages of integrated circuit memory
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US Patent 11977787 Remote direct memory access in multi-tier memory systems
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US Patent 11669260 Predictive data orchestration in multi-tier memory systems
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Patent Primary Examiner
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Mardochee Chery
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CPC Code
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G06N 3/08
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G06F 3/0658
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G06F 3/0646
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G06F 3/068
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G06F 13/1694
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G06F 3/061
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G06F 12/0811
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G06F 2212/1021
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A computing system having memory components of different tiers. The computing system further includes a controller, operatively coupled between a processing device and the memory components, to: receive from the processing device first data access requests that cause first data movements across the tiers in the memory components; service the first data access requests after the first data movements; predict, by applying data usage information received from the processing device in a prediction model trained via machine learning, second data movements across the tiers in the memory components; and perform the second data movements before receiving second data access requests, where the second data movements reduce third data movements across the tiers caused by the second data access requests.

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