Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Arvind Kumar0
Dirk Pfeiffer0
Jean-Olivier Plouchart0
Takashi Ando0
Date of Patent
July 5, 2022
0Patent Application Number
172184960
Date Filed
March 31, 2021
0Patent Citations
Patent Primary Examiner
An approach to creating a tamper-resistant field programmable gate array (FPGA) and remotely reprogramming the tamper-resistant FPGA. In one aspect, determining if an encryption key is stored in a physical unclonable function (PUF) of the FPGA. Further, responsive to the encryption key not being stored in a PUF, writing an encryption key in tamper resistant memory associated with a back end of the line (BEOL) of the FPGA. In another aspect, writing a program key and a look-up table (LUT) in the tamper resistant memory.
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