Patent attributes
A semiconductor memory device includes first conductive layers, second conductive layers, a semiconductor layer disposed between the first conductive layers and the second conductive layers, and a charge storage layer including a first part disposed between the first conductive layers and the semiconductor layer and a second part disposed between the second conductive layers and the semiconductor layer. This semiconductor memory device is configured to execute a first write operation in which a first program voltage is supplied to a third conductive layer which is one of the first conductive layers and a write pass voltage is supplied to a fourth conductive layer which is another of the first conductive layers, and a second write operation in which a second program voltage is supplied to the third conductive layer and to the fourth conductive layer.