US Patent 11385934 Configurable logic platform with reconfigurable processing circuitry

A configurable logic platform may include a physical interconnect for connecting the platform to a processor, a reconfigurable logic region having logic blocks configured based on configuration data, a configuration port for applying configuration data to the reconfigurable logic region, a reconfiguration logic function accessible via transactions of the physical interconnect and in communication with the configuration port, the reconfiguration logic function providing restricted access to the configuration port from the physical interconnect, and an interface function accessible via transactions of the physical interconnect and providing an interface to the reconfigurable logic region which allows information to be transmitted over the physical interconnect and prevents the reconfigurable logic region from directly accessing the physical interconnect. The reconfiguration logic function may be implemented in the reconfigurable logic region.