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US Patent 11392310 Memory system and controller

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Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11392310
Date of Patent
July 19, 2022
Patent Application Number
16904039
Date Filed
June 17, 2020
Patent Citations
‌
US Patent 10748589 Memory system
‌
US Patent 10175891 Minimizing read latency for solid state drives
Patent Primary Examiner
‌
Craig S Goldschmidt
CPC Code
‌
G06F 3/0604
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G06F 3/0673
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G06F 3/064
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G06F 3/0652
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G06F 12/0246
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G06F 3/065
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G06F 3/0619
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G06F 3/061
...

A memory system includes a memory device including a plurality of memory blocks, and a controller for controlling the memory device. The controller stores user data in an original block selected among the memory blocks. When the original block becomes a closed block, the controller generates a copy block by copying each page of the original block into a page having the same page address of a free block among the memory blocks, and stores map data associated with the user data in the memory device, the map data including a logical address of the user data, an address of the original block, an address of the copy block, and a common page address. The common page address is a page address which is in common in the original block and the copy block. In embodiments, the controller limits the number of copy blocks according to a configurable copy level.

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