Patent 11418024 was granted and assigned to Western Digital on August, 2022 by the United States Patent and Trademark Office.
An electrostatic discharge (ESD) circuit including a booster cell is disclosed. The ESD circuit may include first and second rails configured to provide power to the ESD circuit. The first rail may include two spaced apart conductors. The ESD circuit may further include an input/output (I/O) pad and a power/ground (P/G) pad. The P/G pad may include a power clamp electrically coupled between the first and second rails. The booster cell may be physically located between the I/O pad and the P/G pad. The booster cell may provide an electrical connection between the two spaced apart conductors.