Testing of the noise-shaping circuitry within a successive approximation register (“SAR”) analog-to-digital converter (“ADC”) (“SAR ADC”) to ensure it will function as expected, while also providing a method for calibrating the coefficients of the noise-shaping circuitry. Programmable/trimmable circuit component(s) can be used to calibrate the coefficient(s) of the SAR ADC. Digital logic within the SAR engine enables it to selectively skip portions of the ADC conversion process and to use voltage references rather than an analog voltage input signal in sample mode during such test/calibration modes.