US Patent 11436083 Data address management in non-volatile memory

A method, an apparatus, and a system for data address management in non-volatile memory. Write data is allocated to each of a plurality of multi-level pages configured for storage on a page of a non-volatile memory array. A digest is associated with the write data of one multi-level page based on an attribute for that multi-level page. This attribute differs from the attributes of at least one of the other multi-level pages. An amount of redundancy data to be stored with write data on the multi-level page is reduced to account for the associated digest. A digest may be distributed among a plurality of ECC codewords of a multi-level page. The reduced redundancy data, the digest, and the write data for the multi-level page are stored on the page along with the write data for each of the other multi-level pages of the plurality of multi-level pages.