US Patent 11437433 Techniques for MRAM top electrode via connection

Some embodiments relate to a method for forming a memory device. The method includes forming a first memory cell over a substrate and forming a second memory cell over the substrate. Further, an inter-level dielectric (ILD) layer is formed over the substrate such that the ILD layer comprises sidewalls defining a first trough between the first memory cell and the second memory cell. In addition, a first dielectric layer is formed over the ILD layer and within the first trough.