US Patent 11450584 Warpage control of semiconductor die
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Edits on 16 Oct, 2023
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Patent Inventor Names
Ching-Chuan Chang0
Po-Chang Kuo0
Yi-An Lin0
Yun-Ting Wang0
Edits on 28 Sep, 2022
Golden AI
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Patent Citations
Edits on 21 Sep, 2022
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US Patent 11450584 Warpage control of semiconductor die
Article
A method is provided. A bottom passivation layer is formed on a dielectric layer over a semiconductor substrate. Then, a first opening is formed in the bottom passivation layer to expose a portion of the dielectric layer. Next, a metal pad is formed in the first opening. Afterwards, a first oxide-based passivation layer is formed over the metal pad. Then, a second oxide-based passivation layer is formed over the first oxide-based passivation layer. The second oxide-based passivation layer has a hardness less than a hardness of the first oxide-based passivation layer.
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Patent Jurisdiction
Patent Number
114505840
Date of Patent
September 20, 2022
0Patent Application Number
169978690
Date Filed
August 19, 2020
0Patent Citations
Patent Primary Examiner
CPC Code
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