Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Amrita Mathuriya0
Rajeev Kumar Dokania0
Ramamoorthy Ramesh0
Robert Menezes0
Sasikanth Manipatruni0
Yuan-Sheng Fang0
Date of Patent
September 20, 2022
0Patent Application Number
173908300
Date Filed
July 30, 2021
0Patent Citations
Patent Primary Examiner
CPC Code
A low power sequential circuit (e.g., latch) uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. The sequential circuit includes a 3-input majority gate having first, second, and third inputs, and a first output. The sequential circuit includes a driver coupled to the first output, wherein the driver is to generate a second output. The sequential circuit further includes an exclusive-OR (XOR) gate to receive a clock and the second output, wherein the XOR gate is to generate a third output which couples to the second input, where the first input is to receive a data, and wherein the third input is to receive the second output.
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