US Patent 11493985 Selectively controlling memory power for scheduled computations

A computer system comprising a scheduled computation module, a work memory storage device, and a controller. The scheduled computation module is configured to receive and process data values according to a predetermined access pattern. The work memory storage device includes one or more work memory banks. The controller is configured to, based on scheduling information associated with the predetermined access pattern, (1) provide data values held by the one or more work memory banks to the scheduled computation module, and (2) selectively control a power state of the one or more work memory banks.