US Patent 11507147 Computing chassis including removeable midplanes

A computing chassis, including: a first storage processor assembly; a second storage processor assembly; a first midplane, wherein the first storage processor assembly and the second storage processor assembly are coupled concurrently to the first midplane; and a second midplane, wherein the first storage processor assembly and the second storage processor assembly are coupled concurrently to the second midplane, wherein communication between the first storage processor assembly and the second storage processor assembly is through the first midplane and the second midplane independently.