Patent attributes
A semiconductor structure and a method for forming the same are provided. In one form, the method includes: providing a base, a gate structure being formed on the base, a source/drain doped layer being formed within the base on both sides of the gate structure, and an initial dielectric layer being formed on the base exposed from the gate structure, the initial dielectric layer covering a top of the gate structure, and a source/drain contact plug electrically connected to the source/drain doped layer being formed within the initial dielectric layer on the top of the source/drain doped layer; removing a portion of a thickness of the initial dielectric layer to form a dielectric layer exposing a portion of a side wall of the source/drain contact plug; forming an etch stop layer on at least the side wall of source/drain contact plug exposed from the dielectric layer; etching the dielectric layer on the top of the gate structure using etch stop layers on side walls of adjacent source/drain contact plugs as lateral stop positions, to form a gate contact exposing the top of the gate structure; forming, within the gate contact, a gate contact plug electrically connected to the gate structure. Implementations of the present disclosure facilitate enlargement of a process window for forming a contact over active gate.
