US Patent 11532703 Semiconductor device and method

In an embodiment, a device includes: a power rail contact; an isolation region on the power rail contact; a first dielectric fin on the isolation region; a second dielectric fin adjacent the isolation region and the power rail contact; a first source/drain region on the second dielectric fin; and a source/drain contact between the first source/drain region and the first dielectric fin, the source/drain contact contacting a top surface of the first source/drain region, a side surface of the first source/drain region, and a top surface of the power rail contact.