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US Patent 11545582 Method for forming gate-all-around structure
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Patent
Date Filed
November 2, 2020
Date of Patent
January 3, 2023
Patent Applicant
Taiwan Semiconductor Manufacturing Company
Patent Application Number
17086988
Patent Citations
US Patent 10535738 Semiconductor structure and manufacturing method of the same
US Patent 10755985 Gate metal patterning for tight pitch applications
US Patent 10770290 Method for forming stacked nanowire transistors
US Patent 11201152 Method, apparatus, and system for fin-over-nanosheet complementary field-effect-transistor
US Patent 11139400 Non-planar semiconductor device having hybrid geometry-based active region
US Patent 10170378 Gate all-around semiconductor device and manufacturing method thereof
US Patent 10236217 Stacked field-effect transistors (FETs) with shared and non-shared gates
US Patent 10332970 Method for manufacturing horizontal-gate-all-around devices with different number of nanowires
US Patent 10475935 Nanometer semiconductor devices having high-quality epitaxial layer
Patent Citations Received
US Patent 12021153 Semiconductor structure
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11545582
Patent Primary Examiner
Victor A Mandala
CPC Code
H01L 29/42392
H01L 29/66742
H01L 29/78696
H01L 29/66545
H01L 27/092
H01L 29/16
H01L 29/0673
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