Log in
Sign up
Golden has been acquired by ComplyAdvantage.Read about it here ⟶
‌

US Patent 11557516 3D chip with shared clock distribution network

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
November 19, 2020
Date of Patent
January 17, 2023
Patent Application Number
16953113
Patent Citations
‌
US Patent 10262911 Circuit for and method of testing bond connections between a first die and a second die
‌
US Patent 10586786 3D chip sharing clock interconnect layer
‌
US Patent 10593667 3D chip with shielded clock lines
‌
US Patent 10600691 3D chip sharing power interconnect layer
‌
US Patent 10600735 3D chip sharing data bus
‌
US Patent 10600780 3D chip sharing data bus circuit
‌
US Patent 10607136 Time borrowing between layers of a three dimensional chip stack
‌
US Patent 10672663 3D chip sharing power circuit
‌
US Patent 10672743 3D Compute circuit with high density z-axis interconnects
‌
US Patent 10672744 3D compute circuit with high density Z-axis interconnects
•••
Patent Citations Received
‌
US Patent 12027512 Chipset and manufacturing method thereof
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11557516
Patent Primary Examiner
‌
Brook Kebede
CPC Code
‌
H01L 27/0688
‌
H01L 25/0657
‌
H01L 21/8221
‌
H01L 23/5286
‌
H01L 24/10
‌
H01L 24/26
‌
H01L 24/49

Find more entities like US Patent 11557516 3D chip with shared clock distribution network

Use the Golden Query Tool to find similar entities by any field in the Knowledge Graph, including industry, location, and more.
Open Query Tool
Access by API
Golden Query Tool
Golden logo