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Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
January 31, 2023
0Patent Application Number
177271100
Date Filed
April 22, 2022
0Patent Citations Received
Patent Primary Examiner
CPC Code
An apparatus includes control logic coupled to a phase detector circuit and an adjustable delay circuit. The control logic is configured to obtain a state of a first phase of an output signal of a phase interpolator relative to a second phase of a reference signal, and adjust a delay of the reference signal until the second phase matches the first phase. The control logic is further configured to measure a total delay of the reference signal when the second phase matches the first phase, and determine integral non-linearity of the phase interpolator at the first code based on the total delay. The control logic may further calibrate a first code of a phase interpolator based, at least in part, on the integral non-linearity.
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