Patent attributes
A Memory Device (MD) for storing temporary data designated for volatile storage by a processor and persistent data designated for non-volatile storage by the processor. An address is associated with a first location in a volatile memory array and with a second location in a Non-Volatile Memory (NVM) array of the MD. Data is written in the first location, and flushed from the first location to the second location. A refresh rate for the first location is reduced after flushing the data from the first location until after data is written again to the first location. In another aspect, a processor designates a memory page in a virtual memory space as volatile or non-volatile based on data allocated to the memory page, and defines the volatility mode for the MD based on whether the memory page is designated as volatile or non-volatile.
