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US Patent 11600309 3D memory with 3D sense amplifier
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Patent
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Date Filed
December 15, 2020
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Date of Patent
March 7, 2023
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Patent Application Number
17122173
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Patent Citations
US Patent 11302695 Method for forming integrated semiconductor device with 2D material layer
US Patent 10217674 Three-dimensional monolithic vertical field effect transistor logic gates
US Patent 10944012 Area-efficient inverter using stacked vertical transistors
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11600309
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Patent Primary Examiner
Leon Viet Q Nguyen
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CPC Code
G11C 7/12
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G11C 8/10
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G11C 2207/12
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H01L 23/528
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H01L 27/092
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H01L 29/78618
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H01L 29/78642
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G11C 7/065
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