Patent attributes
A membrane circuit structure having a plurality of switch regions includes first, second and third membranes and a spacer layer. The second membrane is beneath the first membrane, and a lower surface of the second membrane is provided with a conductive pattern in at least one of the switch regions. The spacer layer is disposed between the first and second membranes. The third membrane is beneath the second membrane, and an upper surface of the third membrane is provided with first and second trigger portions separated from each other in the at least one of the switch regions, and the conductive pattern is able to be in contact with the first and second trigger portions, so that the first and second trigger portions are able to be electrically connected to each other through the conductive pattern.