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US Patent 11658671 Latency reduction in analog-to-digital converter-based receiver circuits
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Patent
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Current Assignee
Apple (company)
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Date Filed
September 22, 2021
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Date of Patent
May 23, 2023
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Patent Applicant
Apple (company)
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Patent Application Number
17482322
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Patent Citations
US Patent 9270291 High speed time-interleaved ADC gain offset and skew mitigation
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US Patent 8654898 Digital equalizer for high-speed serial communications
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US Patent 9209825 Methods for sampling time skew compensation in time-interleaved analog to digital converters
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US Patent 10483952 Baseline wander correction using zero and one mismatch adaptation
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US Patent 10720936 ADC reconfiguration for different data rates
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US Patent 11133963 Dsp cancellation of track-and-hold induced ISI in ADC-based serial links
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US Patent 9762423 High data rate multilevel clock recovery system
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US Patent 10277230 Jitter reduction in clock and data recovery circuits
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11658671
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Patent Primary Examiner
Linh V. Nguyen
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CPC Code
H04B 10/2581
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H04B 10/504
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H04B 10/5055
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H04B 10/541
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H04B 10/548
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H04B 10/613
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H04B 10/6162
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H04B 10/6165
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H04L 25/03885
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H04L 1/006
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