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US Patent 11664375 Minimizing shorting between FinFET epitaxial regions
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Patent
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Date Filed
February 12, 2021
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Date of Patent
May 30, 2023
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Patent Application Number
17175340
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Patent Citations
US Patent 9070719 Semiconductor device structure, method for manufacturing the same, and method for manufacturing Fin
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US Patent 9070770 Low interfacial defect field effect transistor
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US Patent 9190519 FinFET-based ESD devices and methods for forming the same
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US Patent 9293459 Method and structure for improving finFET with epitaxy source/drain
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US Patent 9337313 Spacerless fin device with reduced parasitic resistance and capacitance and method to fabricate same
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US Patent 9418994 Fin field effect transistor (FinFET) device structure
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US Patent 9443853 Minimizing shorting between FinFET epitaxial regions
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US Patent 9508825 Method and structure for forming gate contact above active area with trench silicide
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US Patent 9704753 Minimizing shorting between FinFET epitaxial regions
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US Patent 9876016 Wrap-around trench contact structure and methods of fabrication
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•••
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11664375
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Patent Primary Examiner
Thanhha S. Pham
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CPC Code
H01L 21/823481
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H01L 27/0886
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H01L 27/0922
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H01L 27/092
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H01L 27/0924
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H01L 21/823431
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H01L 21/845
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H01L 21/823821
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H01L 29/41791
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H01L 29/66795
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•••
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