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US Patent 11664656 ESD protection for integrated circuit devices
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Patent
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Date Filed
September 24, 2020
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Date of Patent
May 30, 2023
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Patent Application Number
17030694
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Patent Citations
US Patent 10615256 Nanosheet transistor gate structure having reduced parasitic capacitance
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US Patent 10756175 Inner spacer formation and contact resistance reduction in nanosheet transistors
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US Patent 10756613 Controlling current flow between nodes with adjustable back-gate voltage
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US Patent 10790277 Semiconductor device
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US Patent 10790281 Stacked channel structures for MOSFETs
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US Patent 7910917 Structure and method for realizing a microelectronic device provided with a number of quantum wires capable of forming one or more transistor channels
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US Patent 7919816 Electrostatic discharge protection element
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US Patent 8492232 Production of a transistor gate on a multibranch channel structure and means for isolating this gate from the source and drain regions
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US Patent 9385527 Enhanced charge device model clamp
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US Patent 9431529 Confined semi-metal field effect transistor
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•••
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11664656
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Patent Primary Examiner
Jared Fureman
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CPC Code
H02H 9/046
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