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US Patent 11670617 Packages formed using RDL-last process

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Current Assignee
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Date Filed
July 27, 2020
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Date of Patent
June 6, 2023
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Patent Application Number
16939879
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Patent Citations
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US Patent 9972605 Method for fabricating fan-out wafer level package and fan-out wafer level package fabricated thereby
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US Patent 9773768 Method and structure of three-dimensional chip stacking
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US Patent 9847317 Methods of packaging semiconductor devices and packaged semiconductor devices
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US Patent 7385283 Three dimensional integrated circuit and method of making the same
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US Patent 7538434 Copper interconnection with conductive polymer layer and method of forming the same
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US Patent 9728597 Metal-insulator-metal structure and method for forming the same
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11670617
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Patent Primary Examiner
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Selim U Ahmed
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CPC Code
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H01L 23/481
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H01L 25/50
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H01L 23/467
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H01L 23/5389
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H01L 23/5386
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H01L 23/473
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H01L 23/367
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H01L 2224/83895
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H01L 24/26
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H01L 24/83
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