US Patent 11672180 Semiconductor devices and methods of manufacturing

Semiconductor devices and methods of manufacturing the semiconductor devices are provided in which spacers are utilized in order to help protect bottom electrode vias. In embodiments, an opening is formed through dielectric layers, and spacers are formed along sidewalls of the dielectric layers. A bottom electrode via is formed adjacent to the spacers, a bottom, electrode is formed, a magnetic tunnel junction (MTJ) structure is formed over the bottom electrode, and a top electrode is formed over the MTJ structure. The structure is patterned, and the spacers help to protect the bottom electrode via from undesired damage during the patterning process.