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US Patent 11675943 Tool to create a reconfigurable interconnect framework
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Patent
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Date Filed
November 10, 2020
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Date of Patent
June 13, 2023
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Patent Application Number
17094743
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Patent Citations
US Patent 10078620 Runtime reconfigurable dataflow processor with multi-port memory access module
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US Patent 7737994 Large-kernel convolution using multiple industry-standard graphics accelerators
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US Patent 7840403 Entropy coding using escape codes to switch between plural code tables
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US Patent 8131659 Field-programmable gate array based accelerator system
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US Patent 9020276 Hardware coprocessor for stripe-based interest point detection
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US Patent 10296829 Convolution processing apparatus and method
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US Patent 10394929 Adaptive execution engine for convolution computing systems
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US Patent 10417364 Tool to create a reconfigurable interconnect framework
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US Patent 10417560 Neural network unit that performs efficient 3-dimensional convolutions
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US Patent 10438115 Neural network unit with memory layout to perform efficient 3-dimensional convolutions
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•••
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11675943
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Patent Primary Examiner
Paul Dinh
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CPC Code
G06F 9/44505
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G06F 13/4022
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G06F 15/7817
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G06F 2115/08
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G06N 3/0445
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G06N 3/0454
0
G06N 3/0472
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G06N 3/084
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G06N 20/00
0
G06N 20/10
0
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