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US Patent 11688776 Transistor level interconnection methodologies utilizing 3D interconnects
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Patent
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Date Filed
March 30, 2021
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Date of Patent
June 27, 2023
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Patent Application Number
17217104
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Patent Citations
US Patent 7372101 Sub-lithographics opening for back contact or back gate
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11688776
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Patent Primary Examiner
Moin M Rahman
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