US Patent 11709985 Semiconductor device including standard cells with combined active region

A semiconductor device includes a first and a second power rails extending in a row direction, a third power rail extending in the row direction between the first and second power rail, and a first cell arranged between the first second power rails. A cell height of the first cell in a column direction perpendicular to the row direction is equal to a pitch between the first and second power rails. The semiconductor device also includes a second cell arranged between the first and third power rails. A cell height of the second cell in the column direction is equal to a pitch between the first and third power rails. A first active region of the first cell includes a first width in the column direction greater than a second width, in the column direction, of a second active region in the second cell.