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US Patent 11710030 Fault detectable and tolerant neural network
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Patent
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Date Filed
August 30, 2019
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Date of Patent
July 25, 2023
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Patent Applicant
Texas Instruments
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Patent Application Number
16556733
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Patent Citations
US Patent 11204826 Memory error detection and correction
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US Patent 11023320 Technologies for providing multiple levels of error correction
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US Patent 11507452 Error checking for systolic array computation
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Patent Citations Received
US Patent 11801758 Method and apparatus for controlling distributed propulsion systems
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11710030
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Patent Primary Examiner
Steven G Snyder
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