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US Patent 11710962 Device and method for operating the same

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
May 29, 2022
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Date of Patent
July 25, 2023
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Patent Application Number
17827776
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Patent Citations
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US Patent 9425793 Circuit for generating bias voltage for high speed input/output pad
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US Patent 10224817 Power transistor control signal gating
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US Patent 10644701 Input and output circuit and self-biased circuit thereof
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US Patent 10332871 Area-efficient and robust electrostatic discharge circuit
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US Patent 11056880 Snapback electrostatic discharge protection for electronic circuits
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US Patent 7986171 Mixed-voltage I/O buffer
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US Patent 8860497 Oxide stress reduction for a cascode stack circuit
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Patent Citations Received
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US Patent 12088091 Electrostatic discharge protection circuit for chip
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11710962
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Patent Primary Examiner
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Dharti H Patel
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CPC Code
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H02H 9/046
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H02H 1/0007
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G01R 31/001
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