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Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
July 25, 2023
0Patent Application Number
174195480
Date Filed
December 23, 2019
0Patent Citations
Patent Primary Examiner
An analog-to-digital converter and a clock generation circuit thereof are provided. The clock generation circuit comprises cascaded clock generation modules. The clock generation module at each stage is configured to generate a corresponding internal clock signal, and each stage of the clock generation module comprises a delay module and a logic gate module. The second input end of the N-th stage of the logic gate module is connected to the output end of the previous stage of the logic gate module, and the output end of the logic gate module is configured to output an internal clock, so that each stage of the clock generation module can generate one internal clock signal.
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