US Patent 11714709 Enhanced block management for a memory subsystem

Several embodiments of systems incorporating memory components are disclosed herein. In one embodiment, a memory system can include a memory component and a processing device configured to access quality metrics corresponding to memory regions of the memory component. In some embodiments, the processing device can compare the quality metrics to one or more memory management thresholds. In some embodiments, when the quality metrics meet and/or exceed a first threshold, a refresh operation can be scheduled and/or performed on a corresponding memory region. In these and other embodiments, when the quality metrics meet and/or exceed a second threshold, the memory region is retired and removed from an active pool of memory regions.