US Patent 11749345 Memory device and method of operating memory device

The present technology includes a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells connected to word lines, peripheral circuits configured to generate operation voltages to be applied to the word lines, and control logic configured to control the peripheral circuits in response to a program command, a read command, or an erase command. The peripheral circuits include a voltage generator that adjusts a section of threshold voltage distributions of memory cells to be programmed among the memory cells, according to a distance between the word lines.