Patent attributes
The present disclosure provides a fan-out packaging structure and a method for fabricating the fan-out packaging. The fan-out packaging structure includes a first redistribution layer, a second redistribution layer, metal connecting posts, a semiconductor chip, a first filling layer, a first packaging layer, a stacked chip package, a passive element, a second filling layer, a second packaging layer, and metal bumps. By means of the present disclosure, various chips having different functions can be integrated into one packaging structure, thereby improving the integration of the fan-out packaging structure. By means of the first redistribution layer, the second redistribution layer, and the metal connecting posts, a three-dimensional vertical stacked packaging is achieved. In this way, the integration level of the packaging structure can be effectively improved, and the conduction path can be significantly shortened, thereby reducing the power consumption, increasing the signal transmission speed, and increasing the data processing capacity.
