Patent attributes
A method for processing data on a programmable logic controller includes a priority with a predetermined priority level assigned to at least one parallel processing section of a program of a master-processor core of a control task. Respective priority levels are inserted into a data structure as the respective master-processor core arrives at the parallel processing section. A parallel-processor core examines whether entries are present in the data structure and processes partial tasks from a work package of the master-processor core the priority level of which ranks first among the entries. A real-time condition of the control task is met by setting executing times of the programs for the master-processor core so that the master-processor core is capable of processing the partial tasks from the work packages without being supported by the parallel-processor core. The master-processor core further processes partial tasks not processed by the at least one parallel-processor core.
