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US Patent 11775445 Translation support for a virtual cache

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
October 13, 2020
Date of Patent
October 3, 2023
Patent Application Number
17069290
Patent Citations
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US Patent 8041894 Method and system for a multi-level virtual/real cache system with synonym resolution
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US Patent 8095771 Method and system for caching address translations from multiple address spaces in virtual machines
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US Patent 8650012 Caching information to map simulation addresses to host addresses in computer system simulations
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US Patent 8949572 Effective address cache memory, processor and effective address caching method
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US Patent 9183146 Hierarchical cache structure and handling thereof
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US Patent 9477613 Position-based replacement policy for address synonym management in shared caches
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US Patent 9274959 Handling virtual memory address synonyms in a multi-level cache hierarchy structure
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US Patent 9563568 Hierarchical cache structure and handling thereof
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US Patent 7472226 Methods involving memory caches
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US Patent 7873785 Multi-core multi-thread processor
Patent Inventor Names
Johannes C. Reichart
Martin Recktenwald
Anthony Saporito
Markus Helms
Christian Jacobi
Ulrich Mayer
Aaron Tsai
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11775445
Patent Primary Examiner
‌
Eric Cardwell
CPC Code
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G06F 2212/1028
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G06F 2212/1021
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G06F 12/0811
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G06F 2212/283
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G06F 2212/621
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G06F 2212/65
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G06F 2212/683
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Y02D 10/00
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G06F 12/0897
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G06F 2212/656
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