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US Patent 11777034 Hybrid complementary field effect transistor device
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Patent
Date Filed
September 7, 2021
Date of Patent
October 3, 2023
Patent Application Number
17468001
Patent Citations
US Patent 10236217 Stacked field-effect transistors (FETs) with shared and non-shared gates
US Patent 10262890 Method of forming silicon hardmask
US Patent 10297667 Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor
US Patent 10381438 Vertically stacked NFETS and PFETS with gate-all-around structure
US Patent 10332803 Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming
US Patent 11362096 Semiconductor device structure and method for forming the same
US Patent 9356027 Dual work function integration for stacked FinFET
US Patent 10002795 Method and structure for forming vertical transistors with shared gates and separate gates
Patent Inventor Names
Chen Zhang
Ruilong Xie
Junli Wang
Jingyun Zhang
Pietro Montanini
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11777034
Patent Primary Examiner
Earl N Taylor
CPC Code
H01L 29/4238
H01L 29/42392
H01L 29/66439
H01L 29/66545
H01L 29/66795
H01L 29/775
H01L 29/785
H01L 29/78696
H01L 29/42376
H01L 29/41791
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