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US Patent 11782352 Lithography process monitoring method
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Patent
Date Filed
July 26, 2022
Date of Patent
October 10, 2023
Patent Application Number
17815155
Patent Citations
US Patent 8796666 MOS devices with strain buffer layer and methods of forming the same
US Patent 8837810 System and method for alignment in semiconductor device fabrication
US Patent 9093530 Fin structure of FinFET
US Patent 9134633 System and method for dark field inspection
US Patent 9230867 Structure and method for E-beam in-chip overlay mark
US Patent 9404743 Method for validating measurement data
US Patent 9304403 System and method for lithography alignment
US Patent 9548303 FinFET devices with unique fin shape and the fabrication thereof
US Patent 8716841 Photolithography mask and process
US Patent 8736084 Structure and method for E-beam in-chip overlay mark
Patent Inventor Names
Ken-Hsien Hsieh
Shih-Chun Huang
Chih-Jie Lee
Ru-Gun Liu
Shih-Ming Chang
Yung-Sung Yen
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11782352
Patent Primary Examiner
Christopher G Young
CPC Code
G03F 9/7026
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