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US Patent 11789880 Load reduced nonvolatile memory interface
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Patent
Date Filed
October 21, 2022
Date of Patent
October 17, 2023
Patent Application Number
17971201
Patent Citations
US Patent 9484070 Apparatuses supporting multiple interface types and methods of operating the same
US Patent 9653147 Asymmetrical emphasis in a memory data bus driver
US Patent 9792224 Reducing latency by persisting data relationships in relation to corresponding data in persistent memory
US Patent 10031677 High-throughput low-latency hybrid memory module
US Patent 9990246 Memory system
US Patent 10163508 Supporting multiple memory types in a memory slot
US Patent 8272781 Dynamic power control of a memory device thermal sensor
US Patent 8397013 Hybrid memory module
Patent Inventor Names
Frank T. Hady
Emily P. Chung
George Vergis
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11789880
Patent Primary Examiner
Chun Kuan Lee
CPC Code
G11C 11/4076
G06F 13/4068
G06F 13/1673
G06F 13/42
G11C 11/4093
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