Patent attributes
A semiconductor device including a standard cell is provided. The standard cell includes an active region; a gate structure intersecting the active region; a first conductive structure including: a first power supply line and a second power supply line; and a second conductive structure disposed on the first conductive structure, the second conductive structure including: first power distribution patterns spaced apart from each other a first boundary and electrically connected to the first power supply line, second power distribution patterns spaced apart from each other along a second boundary and electrically connected to the second power supply line, net metal lines disposed between and spaced apart from the first power distribution patterns and the second power distribution patterns, and electrically connected to a first portion of the signal lines, and pin metal lines electrically connected to a second portion of the signal lines.
