Patent attributes
A semiconductor device including a lower layer, a plurality of first interconnection lines extending in a first direction on the lower layer, a plurality of second interconnection lines extending in a second direction intersecting the first direction between the first interconnection lines and connecting the first interconnection lines, the second direction intersecting the first direction, first insulating patterns between the second interconnection lines, and second insulating patterns disposed in the first interconnection lines may be provided. The first interconnection lines include connection regions, to each of which at least one of the second interconnection lines is connected. The second insulating patterns extend into the connection regions.
