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US Patent 11839091 Three-dimensional semiconductor memory device

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
September 3, 2020
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Date of Patent
December 5, 2023
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Patent Application Number
17011156
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Patent Citations
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US Patent 8237200 Methods of arranging L-shaped cell blocks in semiconductor devices
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US Patent 8325527 Non-volatile memory devices including vertical NAND strings and methods of forming the same
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US Patent 8564050 3D semiconductor devices and methods of fabricating same
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US Patent 10236211 Method of manufacturing vertical memory devices
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US Patent 9224747 Vertical NAND device with shared word line steps
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US Patent 11075217 Vertical semiconductor devices
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US Patent 8004015 Semiconductor memory device having L-shaped cell blocks arranged in diagonal direction intersecting the horizontal and vertical directions
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US Patent 8203187 3D memory array arranged for FN tunneling program and erase
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Patent Inventor Names
Junhyoung Kim
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Siwan Kim
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Bonghyun Choi
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Kwang-Soo Kim
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11839091
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Patent Primary Examiner
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Shahed Ahmed
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CPC Code
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H01L 27/11519
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H01L 27/11582
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H01L 27/11526
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H01L 27/11556
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H01L 27/11573
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H01L 27/11551
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H01L 27/11524
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H01L 27/1157
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H01L 27/1027
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H01L 27/1028
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