US Patent 11843375 Semiconductor integrated circuit

A semiconductor integrated circuit of embodiments includes a first MOS transistor configured to control conduction and non-conduction between a reference voltage point and a node, a second MOS transistor connected to the first MOS transistor via the node and configured to apply a voltage equal to or lower than a withstand voltage of the first MOS transistor to the node, a third MOS transistor configured to receive supply of a second voltage higher than the first voltage, and output an output signal of a signal level corresponding to a voltage range of the second voltage, and a switch circuit configured to make a voltage of the node a fixed voltage when the first MOS transistor is in an OFF state.