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US Patent 11854902 Integrated circuits with buried interconnect conductors

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
July 20, 2022
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Date of Patent
December 26, 2023
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Patent Application Number
17869132
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Patent Citations
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US Patent 8860148 Structure and method for FinFET integrated with capacitor
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US Patent 9105490 Contact structure of semiconductor device
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US Patent 9236267 Cut-mask patterning process for fin-like field effect transistor (FinFET) device
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US Patent 9236300 Contact plugs in SRAM cells and the method of forming the same
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US Patent 9520482 Method of cutting metal gate
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US Patent 9570395 Semiconductor device having buried power rail
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US Patent 9576814 Method of spacer patterning to form a target integrated circuit pattern
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US Patent 10192819 Integrated circuit structure incorporating stacked field effect transistors
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US Patent 8772109 Apparatus and method for forming semiconductor contacts
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US Patent 8785285 Semiconductor devices and methods of manufacture thereof
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•••
Patent Inventor Names
Chih-Hao Wang
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Kuan-Lun Cheng
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Shi Ning Ju
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Kuo-Cheng Chiang
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11854902
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Patent Primary Examiner
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Calvin Y Choi
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CPC Code
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H01L 29/7854
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H01L 21/823475
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H01L 21/76832
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H01L 21/76876
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H01L 21/823431
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H01L 21/823437
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H01L 21/823468
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H01L 21/823821
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H01L 21/845
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H01L 27/0886
0
•••

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